FPGA-Based Realisation of SDR with OFDM Tranceiver

  • Neenu Joseph Department of ECE, Anna University, Chennai
  • P. Nirmal Kumar Department of ECE, Anna University, Chennai
Keywords: SDR, runtime reconfiguration, OFDM, BPSK, QPSK, QAM, FFT


Software-defined radio architecture is the key point of next generation communication systems in which some of the functional units are designed as software on a reconfigurable processor. This paper proposes the physical layer architecture of SDR with modified orthogonal frequency division multiplexing (OFDM). One of the main drawbacks of OFDM is that its high peak-to-average reduction (PAPR) ratio. The PAPR can be reduced using filtering and adaptive peak windowing method with Kaiser window. The adaptive window method finds the positions of maximum peak values using a peak detector in the signal and applies the window function with variable parameter. The radix 2 scalable N point FFT algorithm is used in the system. The mapping of the information signal is done with BPSK, PSK, and 16 QAM modulation. According to the signal-to- noise ratio (SNR) value, the type of modulation can be selected. Decoding of the OFDM signal in the receiver is done with Viterbi decoding algorithm. The communication system simulation is done in MATLAB and the baseband operations are implemented on Xilinx FPGA.

Defence Science Journal, Vol. 65, No. 3, May 2015, pp.233-239, DOI: http://dx.doi.org/10.14429/dsj.65.6011

How to Cite
Joseph, N., & Kumar, P. N. (2015). FPGA-Based Realisation of SDR with OFDM Tranceiver. Defence Science Journal, 65(3), 233-239. https://doi.org/10.14429/dsj.65.6011
Electronics & Communication Systems