Approaches towards Implementation of Multi-bit Digital Receiver using Fast Fourier Transform

Abhijit S. Kulkarni; Vijesh P.; Hemant V. Paranjape; K. Maheswara Reddy

doi:10.14429/dsj.63.4264

Abhijit S. Kulkarni Defence Avionics Research Establishment, Bangalore
Vijesh P. Defence Avionics Research Establishment, Bangalore
Hemant V. Paranjape Defence Avionics Research Establishment, Bangalore
K. Maheswara Reddy Defence Avionics Research Establishment, Bangalore

DOI: https://doi.org/10.14429/dsj.63.4264

Keywords: Electronic warfare, electronic support measure, low probability of intercept, FFT

Abstract

This paper compares different digital receiver signal processing schemes as applied to current ESM/RWR systems. The schemes include fast fourier transform (FFT)-based, FIR filter-based and mixed architectures. Use of polyphase FFT and IIR filters is also discussed. The specifications and signal processing requirements of a modern digital electronic warfare (EW) receiver are discussed. The design procedures and architectures for all the schemes are brought out. The tradeoffs involved in selection of different parameters for these schemes are also discussed. The digital receiver schemes are modeled and analyzed for different metrics such as, Parameter measurement accuracies, Pulse handling capability, Frequency separation capability, Number of multipliers required for implementation etc. The analysis is done for a 500 MHz BW digital receiver and assumes 8 bit ADC in the front end. The results obtained for the comparison are discussed in the paper. Limited simulations show that overlapped FFT scheme is a better approach for digital receiver processing.

Defence Science Journal, 2013, 63(2), pp.198-203, DOI:http://dx.doi.org/10.14429/dsj.63.4264

Author Biographies

Abhijit S. Kulkarni, Defence Avionics Research Establishment, Bangalore

Mr Abhijit S. Kulkarni received his BE (Electronics Engineering) from University of Pune, in 2005. Currently he is working as a Scientist at Defence Avionics Research Establishment (DARE), Banglore. He has been involved in the design, development and testing of narrowband digital receiver for airborne EW applications.

Vijesh P., Defence Avionics Research Establishment, Bangalore

Mr Vijesh P completed his BTech (Electronics and communications) from Kannur University, in 2003. Currently he is working as a Scientist at DARE, Banglore. His area of work includes: Embedded hardware design, firmware design and implementation and testing of electronic warfare systems

Hemant V. Paranjape, Defence Avionics Research Establishment, Bangalore

Mr Hemant V. Paranjape completed his BE (Electronics and Telecommunications) from Pune University and ME (Telecommunication) from Indian Institute of Science, in 2000 and 2002 respectively. Currently he DARE, Banglore. His current areas of interest include : Hardware design, development and system integration of electronic warfare systems.

K. Maheswara Reddy, Defence Avionics Research Establishment, Bangalore

Dr K Maheswara Reddy received his PhD from Indian Institute of Science, in 1998. Currently he is working as a Scientist at DARE, Banglore. He received DRDO Performance Excellence Award in 2007, 2009, and DRDO Scientist of the Year Award in 2010. His current areas of interest include : Digital receivers for EW applications, high resolution DF estimation techniques and adaptive arrays.