Computational-Efficient Signal Processing Solution to Frequency Quadrupler Based High-Frequency Vector Signal Generator

Authors

  • Devashish Arora Qualcomm India Pvt Ltd., Noida – 201 304, India
  • Girish Chandra Tripathi Department of ECE, IIT Roorkee, Roorkee – 247 667, India
  • Meenakshi Rawat Department of ECE, IIT Roorkee, Roorkee – 247 667, India

DOI:

https://doi.org/10.14429/dsj.20915

Keywords:

Adjacent channel power ratio, Frequency multipliers, Microwave engineering, Principal component analysis, Memory polynomial

Abstract

Due to advancements in technological trends, interest in frequency multipliers is increasing in the research community. However, the linearization approach on frequency multipliers differs from that of power amplifiers and hence cannot be directly implementable for end-to-end high-frequency systems. This paper discusses recent computational approaches and proposes a model for improving performance metrics, especially the adjacent channel power ratio. This paper shows theoretical trends, mathematical approaches to current trends, and the proposed model. It then establishes the theory by experimental implementation and compares the proposition results to the models in the literature.

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Published

2025-05-08

How to Cite

Arora, D., Chandra Tripathi, G., & Rawat, M. (2025). Computational-Efficient Signal Processing Solution to Frequency Quadrupler Based High-Frequency Vector Signal Generator. Defence Science Journal, 75(3), 285–292. https://doi.org/10.14429/dsj.20915