A FPGA based Steganographic System Implementing a Modern Steganalysis Resistant LSB Algorithm

  • Kunjan Pathak Thapar University, Patiala
  • Manu Bansal Thapar University, Patiala
Keywords: Steganography, Data security, Spatial domain algorithm, LSB algorithm, Optimisation for hardware, FPGA implementation

Abstract

Steganography differs from other data hiding techniques because it encodes secret message inside cover object in such a way that transmission of secret message also remains a secret. Widespread usage of digital images, lower computational complexity and better performance makes spatial domain steganographic algorithms well suited for hardware implementation, which are not very frequent. This work tries to implement a modern steganalysis resistant LSB algorithm on FPGA based hardware. The presented work also optimises various operations and elements from original one third probability algorithm with respect to hardware implementation. The target FPGA for the implementation is Xilinx SP605 board (Spartan 6 series XC6SLX45T FPGA). Stego images obtained by the implementation have been thoroughly examined for various qualitative and quantitative aspects, which are found to be at par with original algorithm.

Author Biographies

Kunjan Pathak, Thapar University, Patiala
Mr Kunjan Pathak is MTech student in VLSI Design at Thapar University, Patiala. His research interests include : Data security, optimisation and applications of various algorithms and protocols on hardware. His previous work includes implementation of TDES on FPGA.
Manu Bansal, Thapar University, Patiala
Mrs Manu Bansal is Assistant Professor at department of Electronics and communication, Thapar University, Patiala. Her research interests include : Digital VLSI design. Her previous works are based on minimisation algorithms in VLSI Design.
Published
2017-09-19
How to Cite
Pathak, K., & Bansal, M. (2017). A FPGA based Steganographic System Implementing a Modern Steganalysis Resistant LSB Algorithm. Defence Science Journal, 67(5), 551-558. https://doi.org/10.14429/dsj.67.10177
Section
Electronics & Communication Systems