1.
Tharakan KO, Rao S. Generation of High Power Test Vector Set for Combinational VLSI Circuits. Def. Sc. J. [Internet]. 2002 Oct. 1 [cited 2025 Jun. 16];52(4):351-6. Available from: https://publications.drdo.gov.in/ojs/index.php/dsj/article/view/2190