1.
Mathew SV, Punnekkat S, Saiam A. Optimising Model for Memory Fault Tolerance in Onboard Computer. Def. Sc. J. [Internet]. 2002 Jan. 1 [cited 2025 Jun. 16];52(1):33-9. Available from: https://publications.drdo.gov.in/ojs/index.php/dsj/article/view/2146