NESAMANI, F. P.; RAVEENDRAN, G.; PRABHA, V. Design of Triple Gate for Sub threshold Low Power applications. Defence Science Journal, [S. l.], v. 67, n. 2, p. 169–172, 2017. DOI: 10.14429/dsj.67.10067. Disponível em: https://publications.drdo.gov.in/ojs/index.php/dsj/article/view/10067. Acesso em: 17 aug. 2025.