| || Dry Etching of GaAs to Fabricate Via-Hole Grounds in Monolithic Microwave Integrated Circuits
Author : Rawal, D.S;Agarwal, V.R;Sharma, H.S;Sehgal, B.K;Muralidharan, R
Source : Defence Science Journal ; Vol:59(4) ; 2009 ; pp 363-370
Subject : 621.3.029 Electromagnetic Waves
Keywords : GaAs;MMIC;ICP;RIE;etching;monolithic microwave
Abstract : This study investigates the dry etching of 60 mm dia, 200 mm deep holes for fabrication of through substrate via holes for grounding monolithic microwave integrated circuits (MMICs), on 3-inch dia semiinsulating GaAs wafer using RIE and ICP processes with CFC and non-CFC gas chemistry, respectively. The effect of various process parameters on GaAs etch rate and resultant etch profile was investigated. Two kinds of masks, photoresist and Ni, were used to etch GaAs and performance was compared by investigating effect on etch rate, etch depth, etch profile, and surface morphology. The etch profile, etch depth, and surface morphology of as-etched samples were characterised by scanning electron microscopy. The desired 200 mm deep strawberry profile was obtained at 40 mTorr for both RIE and ICP processes with an etch rate of ~1.3 mm/min and ~4 mm/min respectively. Ni metal mask was used for RIE process due to poor photoresist selectivity, whereas ICP process utilised photoresist as mask. The vias were then metallised by depositing a thin seed layer of Ti/Au (1000 Å) using radio frequency sputtering and Au (~5 mm) electroplated to connect the frontside pad and back side ground plane. The typical parasitic inductance offered by these via for RIE and ICP processes was ~76 pH and 83 pH respectively, which is well within the acceptable limits. The developed process was finally integrated to in-house MMIC production line.