| || Estimation of Fatigue-life of Electronic Packages Subjected to Random Vibration Load
Author : Sakri, M.I.;Saravanan, S.;Mohanram, P.V.;Abuthakeer, S. Syath
Source : Defence Science Journal ; Vol:59(1) ; 2009 ; pp 58-62
Subject : 538.9 Solid State Technology
Keywords : Dual in-line package;DIP;Random vibrations;JEDEC standard;Electronic package reliability
Abstract : Random vibration is being specified for acceptance tests, screening tests, and qualification tests by manufacturers of electronic equipment meant for military applications, because it has been shown that random vibration more closely represents the true environment in which the electronic equipment must operate. In this paper, the methodology of testing an electronic package subjected to random vibration load is illustrated using Joint Electronic Device Engineering Council’s (JEDEC) JESD22-B103B standard. The electronic package mounted at the centre of the printed circuit board was subjected to vibration, variable frequency condition ‘D’ of JEDEC standard for 30 min. After 30 min of random vibration test, the component lead-wires, solderjoints, and PCB were thoroughly inspected for failure. From the observations, it was found that no failure occurred during the test period. The fatigue life of the component, estimated using analytical method, was found to be 96.48 hours.